Stateside Spec Engineering jobs in the United States

Rigetti

Senior Quantum Engineer, Gate Calibration

Berkeley, CA · On-site · Senior

Discipline
Hardware
Industry
Semiconductor

Spec sheet

Automatically summarized from the employer’s posting. Check the original description below for full requirements.

QPU

Senior Quantum Engineer in Berkeley focusing on two-qubit gate fidelity in tunable-coupler superconducting processors. You will design, execute, and interpret experiments to identify and eliminate dominant sources of two-qubit gate error through pulse engineering, calibration methods, and feedback to design/fabrication, influencing device design and control strategy in a collaborative, cross-functional environment.

Required

  • two-qubit gate
  • pulse engineering
  • calibration methodology
  • error suppression
  • gate performance
  • device design
  • fabrication
  • measurement and improvement

Preferred

  • tunable-coupler superconducting qubits
  • error budgeting
  • control strategy
  • platform-level decisions
  • surgeon-level autonomy
  • device fabrication collaboration

Employer description

We are looking for an experienced Quantum Engineer to drive the two-qubit gate performance of our tunable-coupler superconducting quantum processors.
Two-qubit gate fidelity is one of the most consequential challenges in quantum computing, and it sits at the center of our roadmap toward error correction. In this role, you will design, execute, and interpret the experiments that propel our near- and long-term gate performance at scale. You will identify the dominant sources of two-qubit gate error on our processors, isolate their physical origin, and eliminate them — through pulse engineering, calibration methodology, error suppression strategies, or feedback to design and fabrication. Your conclusions will directly inform device design, control strategy, and platform-level decisions.
This is a role with substantial autonomy and ownership. You will directly influence the technical direction for gate performance work through the rigorous design and execution of your test plans, measurement and improvement of relevant metrics and error budgeting, and shaping of research priorities. You will do this in a deeply collaborative environment spanning device design, fabrication, control systems, software, theory and R&D, turning proofs of concept into robust procedures that hold up across hundreds of qubit pairs.

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