Stateside Spec Engineering jobs in the United States

Quadric

RTL SoC Design Intern

Burlingame, CA · On-site · Intern

Discipline
Hardware
Industry
Semiconductor

Spec sheet

Automatically summarized from the employer’s posting. Check the original description below for full requirements.

Quadric offers an internship to support SoC subsystem development and PPA optimization, with hands-on front-end design exposure in a Bay Area office.

$50–$57 / hour · Contract · Day shift · 0+ years · Bachelor’s/Master’s/PhD in Electrical/Computer Engineering or related

Required

  • SystemVerilog or Verilog
  • SoC/ASIC front-end design concepts
  • Python scripting
  • collaborate with architects/designers
  • problem-solving/debugging
  • clear technical communication
  • exposure to RTL design or logic synthesis (preferred)

Preferred

  • RTL design
  • FPGA design
  • performance modeling
  • Python LLMS usage

Benefits

  • medical
  • 401k
  • PTO

Employer description

Quadric is redefining edge AI with the industry’s first General Purpose Neural Processing Unit (GPNPU), enabling developers to run both neural network inference and conventional C++ code on a single programmable architecture. Our technology powers intelligent edge devices across automotive, industrial, robotics, and embedded systems.

Founded in 2016 and based in downtown Burlingame, California, Quadric is building the world’s first supercomputer designed for the real-time needs of edge devices. Quadric aims to empower developers in every industry with superpowers to create tomorrow’s technology, today. The company was co-founded by technologists from MIT and Carnegie Mellon, who were previously the technical co-founders of the Bitcoin computing company 21.

The OpportunityThis is a chance to get hands-on experience building a next-generation SoC architecture from the ground floor, working directly alongside our hardware team as we bring supercomputer technology to the Edge.

You’ll support the SoC design team with subsystem development, third-party IP integration, and PPA (power, performance, area) optimization for Quadric’s GPNPU platform — gaining exposure to real front-end design and integration methodologies, and working closely with the architects who define the chip.

Note: Our preference is for this internship to be based out of our Burlingame, California office. Candidates should be based in the Bay Area or able to relocate for the internship period and available to work on site.

What You’ll Do

Support SoC Subsystem Development

Help design and integrate SoC-level subsystems, working alongside engineers integrating third-party IP (such as NoC, PCIe/UCIe interfaces, DDR, Security, etc.).

Contribute to documentation of SoC architecture and application requirements.

Support PPA Optimization

Assist in analyzing and optimizing Power, Performance, and Area (PPA) at the SoC level.

Get exposure to low-power digital design techniques and timing closure work across front-end stages.

Collaborate Across the Team

Work closely with SoC architects and designers to understand design intent and integration requirements.

Communicate findings, blockers, and technical questions clearly to the team.

What Success Looks LikeWithin your internship, you’ll:

Build a working understanding of SoC subsystem development and integration.

Contribute analysis or documentation that meaningfully supports PPA optimization efforts.

Develop hands-on fluency with SystemVerilog or Verilog in a real front-end design environment.

What We’re Looking ForRequired

Currently pursuing a Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or a related field.

Familiarity with SoC/ASIC front-end design concepts.

Proficient in SystemVerilog or Verilog.

Prepared to collaborate with architects and designers on subsystem development and integration tasks.

Demonstrated capability in problem-solving, debugging, and clear technical communication.

Preferred

Coursework or project experience with computer architecture, low-power design, or RTL design.

Exposure to logic synthesis, FPGA design, or performance modeling.

Adept with scripting languages like Python and using LLMs to get things done

 What We OfferThe hourly salary range for this temporary position is $50-57/hr . This range reflects the full span of levels and geographies at which Quadric hires for this role. The actual hourly salary offered will depend on a number of factors, including the specific level of the role, years and depth of relevant experience, technical skills and competencies.

Quadric interns receive hands-on experience working alongside industry experts in AI and semiconductor technology, with access to mentorship and meaningful project ownership from day one along with following

 Catered lunch each day in our office

Downtown Burlingame office location, close to shops, cafes, and local amenities

A work culture focused on innovative disruption

If this role resonates with you, we encourage you to apply even if your experience does not perfectly match every qualification. We value potential, curiosity, and a willingness to learn just as much as direct experience.

 Equal Employment OpportunityQuadric is an equal opportunity employer. We do not discriminate on the basis of race, color, religion, sex, national origin, age, disability, veteran status, sexual orientation, gender identity, marital status, medical condition, or any other characteristic protected by applicable federal, state, or local law

E-Verify and Right to Work NoticesQuadric participates in the E-Verify program to confirm employment eligibility for U.S.-based roles. As part of this process, applicants may review the following notices, which explain your rights and our participation in E-Verify. These notices are provided in English and Spanish.

E-Verify Participation Notice (English Spanish)
Right to Work Notice (English Spanish)

No action is required from candidates during the application process. These notices are provided for informational purposes only.

 PrivacyBy submitting an application, you acknowledge that Quadric will collect and process your personal information as part of the hiring process. Please review our Privacy Policy to understand how we handle your data

Stateside Spec lists roles for engineering teams in the United States. Work-authorization notes come from the employer. We do not guarantee visa policy. Apply off-site. Report an issue with this listing View employer source