Stateside Spec Engineering jobs in the United States

NVIDIA

Signal Integrity and PCB Design Engineer

Santa Clara, CA · On-site · Mid

Discipline
Hardware
Industry
Semiconductor

Spec sheet

Automatically summarized from the employer’s posting. Check the original description below for full requirements.

Signal Integrity and PCB Design Engineer at NVIDIA in Santa Clara, CA, focusing on SI/PI across PCIe, DRAM, MIPI, HDMI, USB interfaces with Cadence tools and PDN optimization; requires 2+ years in SI/PI and MS/BS in EE.

$116,000–$189,750 / year · Day shift · Equity · 2+ years · BS/MS in Electrical Engineering

Required

  • Signal Integrity
  • PCB design
  • Cadence Allegro
  • Constraints Manager
  • PDN
  • SI/PI
  • HFSS or Sigrity or Hspice

Preferred

  • SI/PI design sign-off experience
  • PCB fabrication familiarity
  • high-speed transceiver design
  • equalization schemes

Benefits

  • medical
  • 401k
  • equity
  • PTO

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Employer description

We are looking for a Signal Integrity & PCB design Engineer! NVIDIA is powering the next wave of AI and accelerated computing, and our PCB technology is a critical enabler of the world’s highest-performance systems. Join our SI team to ensure that every board we ship meets the most demanding signal integrity requirements — from early material research through high-volume manufacturing. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.

 

If you love solving complex signal integrity challenges and thrive on bridging the gap between design intent and manufacturing reality, we want to hear from you.

 

What you’ll be doing:

Lead SI design activities, PCB stackup design, material selection, design guide implementation and post-layout analysisSystem-level signal integrity simulation of PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, USB and other interfaces.Analyze and optimize Power delivery network (PDN) on PCBs.Work closely with Package and PCB Design teams crafting solutions for system SI/PI performanceTDR & VNA measurement for PKG/PCB material characterization and model correlation 

What we need to see:

BS/MS in Electrical Engineering (or equivalent experience) with minimum 2+ years of experience as a SI/PI engineerDeep understanding of electromagnetics, transmission line theory and various channel components.Experienced with Cadence Allegro PCB designer and Constraints Manager and or other PCB stackup designer toolsUnderstanding of impacts of high-volume PCB manufacturing on channel signal integrityExperience with SI channel design solutions for industry standard interface like PCIE, DRAM, MIPI, HDMI, USB etc.Hands on experience with HFSS, Sigrity, Hspice and/or similar industry standard tools 

Ways to stand out from the crowd:

Experience of SI/PI design sign off process at platform levelFamiliarity with PCB fabrication process, understanding of PCB and package material choice impact on SI performanceFamiliarity with high-speed transmitter, receiver design, and various equalization schemes

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until October 10, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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