Stateside Spec Engineering jobs in the United States

Intel

SoC Design Verification Engineer

Fort Collins, CO and 2 more · On-site · Intern

Sites: Fort Collins, CO, Folsom, CA, Hillsboro, OR

Discipline
Hardware
Industry
Semiconductor

Spec sheet

Automatically summarized from the employer’s posting. Check the original description below for full requirements.

Data Center Group (DCG)

SoC Design Verification Engineer at Intel in Fort Collins/ Folsom/ Hillsboro performs functional verification and emulation validation for server SoCs. Entry-level position requiring Master’s in Electrical/CS/CE plus 0+ years experience; shift is day, on-site in US locations; expects UVM/SystemVerilog, debugging, and verification planning skills.

$105,650–$149,150 / year · Day shift · Equity · 0+ years · Master's degree in Electrical Engineering, Computer Science or Computer Engineering

Required

  • functional verification
  • emulation validation
  • test benches
  • verification plans
  • debug
  • UVM/SystemVerilog
  • pre-silicon/ post-silicon understanding

Preferred

  • Xeon CPU pre-silicon
  • emulation validation
  • post-silicon validation
  • regression tests
  • coverage closure
  • scripting languages

Benefits

  • medical
  • retirement
  • vacation
  • stock bonuses

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Employer description

Job Details:

Job Description: As a SoC Design Verification Engineer, you will be responsible for ensuring the functionality and reliability of Intel’s cutting-edge server SoCs. You will perform functional logic verification and emulation validation to confirm designs meet specifications, uncover potential issues, and implement corrective measures. Through your technical contributions, you will play a vital role in advancing the development of next-generation Xeon server products, driving innovation and excellence in Intel’s technology offerings.

 

Business group

You will join Intel’s Data Center Group (DCG), which is dedicated to delivering leading-edge technologies and solutions for data centers that power the world’s digital infrastructure. The team focuses on validating advanced Xeon server SoCs and IPs, providing innovative solutions that enhance performance, scalability, and efficiency. The group’s mission aligns with Intel’s broader vision of creating world-changing technology that enriches lives globally.

 

Key Responsibilities

Perform functional verification and emulation validation of integrated SoCs to ensure designs meet specifications.Develop scalable and reusable block, subsystem, and SoC verification plans, test benches, and environments.Execute verification plans, analyze system simulation models, and debug power and performance issues.Root-cause failure issues and implement corrective measures in the pre-silicon environment.Collaborate with architects, RTL developers, post-silicon teams, and physical design experts to enhance verification.Document test plans and drive technical reviews with design and architecture teams.Conduct regression and debug tests to integrate security activities and ensure comprehensive coverage.Maintain and improve verification infrastructure and methodology, absorbing learnings from post-silicon validations.

Qualifications:This is an entry level position. You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum qualifications and are considered a plus factor in identifying top candidates.

 

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

 

Minimum Qualifications

Master’s degree in Electrical Engineering, Computer Science or Computer Engineering+6 months of experience in Silicon Design and/or Validation/Verification methodologies and tools. 

Preferred Qualifications

Experience in design verification for complex IPs and SoCs.Knowledge of UVM/SystemVerilog constrained-random coverage-based design verification methodologies.Familiarity with the complete verification lifecycle, including test plan creation, bug debugging, and coverage closure.Skills in developing validation test suites and driving continuous improvement into existing methodologies.Understanding of cache coherency principles in multiprocessor SoCs and layered protocols.Proficiency in scripting languages for automation purposes.Strong debugging skills and ability to independently resolve technical issues.Experience with Xeon CPU pre-silicon, emulation validation, or post-silicon validation. 

Join us to innovate, learn, and make a meaningful impact in Intel’s transformative journey to create world-changing technology.

          

Job Type:College Grad

Shift:Shift 1 (United States of America)

Primary Location: US, Colorado, Fort Collins

Additional Locations:US, California, Folsom, US, Oregon, Hillsboro

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USD 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. 

 

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.The application window for this job posting is expected to end by 11/05/2026

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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