Stateside Spec Engineering jobs in the United States

Intel

Module Development Engineer (Ph.D.) - Intel Foundry

Hillsboro, OR · On-site · Unspecified

Discipline
Hardware
Industry
Semiconductor

Spec sheet

Automatically summarized from the employer’s posting. Check the original description below for full requirements.

Module Development Engineer at Intel in Hillsboro, OR, developing and transferring semiconductor processes to high-volume manufacturing. Role covers lithography, EPI, thin films, metrology, yield, and process integration.

$133,800–$188,890 / year · Day shift · 0% travel · 0+ years · Ph.D. in Electrical Engineering, Chemical Engineering, Materials Science & Engineering, Physics, Mechanical, Chemistry, or related STEM

Required

  • Patterning & Removal: Lithography, Overlay, Wet Etch, Dry/Plasma Etch, CMP
  • Thin Films & Doping: Epitaxy, ALD/CVD/PVD, Diffusion, Ion Implantation
  • Metrology, Yield & Integration: In-line Metrology, Process Integration, Defec...
  • Process & Hardware Engineering: experimental runs, equipment hardware, new ma...
  • Data Analytics: DOE, SPC, statistical modeling
  • Cross-Functional & Vendor Collaboration
  • HVM Technology Transfer: robust tech transfer to high-volume manufacturing

Preferred

  • Python, MATLAB, DOE/SPC
  • cleanroom experience
  • device physics & FEOL/BEOL
  • technical dissemination (papers, patents)

Benefits

  • health
  • retirement
  • vacation
  • stock bonuses

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Employer description

Job Details:

Job Description: About the Role

Intel Logic Technology Development (LTD) designs and scales the advanced semiconductor process technologies that power future generations of Intel architecture.

As a Module Development Engineer, you will drive the development, optimization, characterization, and high-volume manufacturing (HVM) transfer of leading-edge semiconductor processes.

Patterning & Removal: Lithography, Overlay, Wet Etch, Dry/Plasma Etch, Chemical Mechanical Planarization (CMP).Thin Films & Doping: Epitaxy (EPI), Thin-Film Deposition (ALD/CVD/PVD), Diffusion, Ion Implantation, Metals/Metallization, Dielectrics.Metrology, Yield & Integration: In-line Metrology, FEOL/BEOL Process Integration, Defect Reduction, Yield Analysis, Electrical Characterization.
Key Responsibilities (“What You Will Do”)

Process & Hardware Engineering: Design, execute, and optimize experimental runs to advance semiconductor processes, equipment hardware, and new material capabilities.Process Control & Data Analytics: Apply statistical modeling, Design of Experiments (DOE), and control systems (SPC, APC, Run-to-Run) to reduce variability, mitigate defects, and drive yield enhancement.Cross-Functional & Vendor Collaboration: Partner with external tool/material suppliers and internal integration teams to co-develop cutting-edge equipment and process methodologies.HVM Technology Transfer: Resolve equipment, process, and yield excursion root causes to ensure smooth, robust technology transfer from development into high-volume manufacturing.Documentation & Technical Reporting: Document experimental findings, operating procedures, and technical recommendations through engineering reports and presentations.

Qualifications:Candidates must meet the following criteria (relevant experience may be gained through academic coursework, laboratory research, thesis work, internships, post doc, or publications):

Minimum Qualifications 

Education: Ph.D. in Electrical Engineering, Chemical Engineering, Materials Science & Engineering, Physics, Mechanical, Chemistry, or a related STEM field (expected completion prior to start date).Hands-on Experience: 6+ months of experience with semiconductor fabrication, process development, device research, materials research, or related semiconductor technology, including one or more of the following: lithography (Litho)/overlay, epitaxy (EPI), wet etch, dry etch, thin-film deposition, diffusion, ion implantation, CMP/planarization, metals/metallization, dielectrics, metrology, process integration, yield, or electrical characterization. 
Preferred Qualifications 

Environment & Tooling: 6+ months in a cleanroom or semiconductor research lab working directly with fabrication or analytical instrumentation (e.g., ALD, CVD, PVD, plasma etch, CD-SEM, TEM, AFM, spectroscopic ellipsometry). Data Science & Automation: 6+ months utilizing statistical methodologies (DOE, SPC) and engineering software/scripting languages (Python, MATLAB, JMP, C#, or equivalents) for data analysis and automation. Device Physics & Integration: Academic or research specialization in transistor architecture, advanced semiconductor materials, or FEOL/BEOL process integration. Technical Dissemination: Proven track record of presenting technical findings through dissertations, peer-reviewed publications, conference proceedings, patents, or white papers. 
By applying to this posting your resume and profile will become visible to Intel Recruiters and will allow them to consider you for current and future job openings aligned with the skills and positions mentioned above. 

          

Job Type:

Shift:Shift 1 (United States of America)

Primary Location: US, Oregon, Hillsboro

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $133,800.00-188,890.00 USD 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. 

 

*Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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