Lockheed Martin
ASIC & FPGA Design Engineer Stf - E4
Andover, MA · On-site · Staff
- Discipline
- Hardware
- Industry
- Defense
- Constraints
- Citizenship required by contract Secret
Spec sheet
Automatically summarized from the employer’s posting. Check the original description below for full requirements.
MFC-Chelmsford
ASIC & FPGA Design Engineer Stf at Lockheed Martin in Andover, MA, responsible for HDL-based FPGA design and hardware-software integration. Requires B.S. in EE or related, VHDL/Verilog/SystemVerilog, Xilinx Vivado, timing/CDC/SI, and US citizenship with Secret clearance eligibility.
$135,700–$251,900 / year · Bachelor of Science in Electrical Engineering or related
Required
- HDL programming with VHDL, Verilog, SystemVerilog
- Experience in Hardware-Software Integration and Validation
- Experience with Xilinx FPGAs and Vivado
- FPGA simulation tools like Synopsys VCS and SystemVerilog
- Digital design principles (timing, CDC, SI)
- Troubleshooting and integration issue resolution
- Eligibility to obtain Secret Clearance and US Citizenship
Preferred
- MS in Electrical Engineering
- Active DoD Secret or Top Secret Clearance
- Experience with multiple FPGA vendors (Altera, Microchip)
- Git version control
- C/C++, Python
- UVM verification
- MFC DAR process
- Missile systems and safety
Benefits
- medical
- 401k
- PTO
- Holidays
- Parental Leave
- Life Insurance
- Disability
Employer description
Basic Qualifications
Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education
HDL programming experience with VHDL, Verilog, and/or System Verilog.
Experience in Hardware-Software Integration and Validation.
Experience with Xilinx FPGAs and related toolsets such as Vivado.
Experience with FPGA simulation tools and languages such as Synopsys VCS and SystemVerilog.
Strong understanding of digital design principles, including timing analysis, clock domain crossing, and signal integrity.
Extensive experience with troubleshooting designs and resolving integration issues.
Excellent communication and presentation skills.
Candidate must be eligible to obtain a Secret Clearance and be able to obtain at least an Interim Secret Clearance before starting the position, therefore you must be a US Citizen.
Desired Skills
Master of Science Degree in Electrical Engineering or closely related technical field.
Active DoD Secret or Top Secret Clearance
Significant relevant experience in the defense electronics industry, including FPGA development for RF systems.
Experience with version control systems, such as Git
Experience with multiple FPGA vendors, such as Altera or Microchip
Knowledge of software programming languages, such as C, C++, or Python
Experience with debugging and troubleshooting complex digital systems
Knowledge of UVM and experience with UVM-based verification methodologies
Experience with the MFC DAR process
Experience with Missile systems
Experience with Missile Safety
Extensive experience with troubleshooting designs and resolving integration issues in a production or manufacturing environment.
Expertise with datalink or T/R module architecture.
Expertise with technical documentation such as specifications, schematic drawings, and test data.
Experience with customer interface including technical presentations.
Ability to lead failure investigations on production and/or technical issues.
Ability work in a team collaborative environment especially with manufacturing and industrial engineers and/or operator on production support.
Pay Information
Full-Time Salary Range: $135700.00 - $251900.00
At Lockheed Martin, we know mission success starts with taking care of our people. Our Total Rewards program is designed to attract top talent, support your well-being, and help you grow—both professionally and personally.
The salary range for this position is as listed on the requisition. Please note that the salary information listed is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate’s work experience, education/ training, key skills as well as market(work location) and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Flexible work arrangements and schedules (e.g., 4x10), 401(k) match, Paid time off, Holidays, Parental Leave, EAP, Flexible Spending Accounts, Education Assistance, Life Insurance, Short-Term Disability, and Long-Term Disability.
Annual short-term and/or long-term incentive compensation programs may be offered depending on the position. Payments under these annual programs are not guaranteed and can vary from year to year and are tied to a range of performance metrics.For (Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.
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