Boeing
Design-for-Test (DFT) Engineer — ASIC Backend – (Associate, Experienced, or Lead)
El Segundo, CA · On-site · Unspecified
- Discipline
- Hardware
- Industry
- Aerospace
- Constraints
- U.S. person required
Spec sheet
Automatically summarized from the employer’s posting. Check the original description below for full requirements.
Boeing Space, Intelligence & Weapons Systems (Electronic Products)
Design-for-Test (DFT) Engineer — ASIC Backend at Boeing in El Segundo, CA working on DFT architectures and test infrastructure for ASICs. Must have 2+ years in DFT, Verilog/SystemVerilog, TAP/JTAG/IJTAG, MBIST, ATPG, and silicon debug; US person required; onsite 1st shift; relocation offered.
$98,600–$133,400 / year · Day shift · Relocation offered · 2+ years · Bachelor's Degree
Required
- DFT
- ASIC
- TAP/JTAG
- IJTAG
- MBIST
- scan compression
- ATPG
- silicon debug
Preferred
- Experience 5+ years (Level 3) or 9+ years (Level 4)
- Security clearance
- HDL Verilog/SystemVerilog
- Python/Tcl/Perl scripting
Benefits
- medical
- retirement/401k
- paid time off
Employer description
Design-for-Test (DFT) Engineer — ASIC Backend – (Associate, Experienced, or Lead)
Company:
Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple Design-for-Test (DFT) Engineers — ASIC Backend to join us as part of our Boeing Electronic Products team at the heart of Boeing’s products to support advanced digital subsystem development in an aerospace environment in El Segundo, CA.
Position overview
The DFT team drives architecture, verification, and post-silicon validation for leading-edge ASICs. We seek engineers across experience levels (Jr → Principal) to design and validate test access mechanisms, memory BIST, scan compression, and related test infrastructure.
Key responsibilities
Design and implement DFT architectures: TAP/JTAG, IJTAG (IEEE 1687), Boundary Scan (BSCAN), MBIST, and scan compressionDevelop and validate TAP/JTAG and IJTAG infrastructures, BSDL/ICL/PDL artifacts, and ATPG pattern generationDrive pattern generation, coverage optimization, memory test validation, and silicon debug (scan, at-speed, bring-up)Integrate DFT features across the chip design flow and collaborate with cross-functional teams to ensure robust DFT integrationCoordinate with external partners/customers on custom DFT interfaces and security requirements when applicableContribute to development and deployment of DFT methodologies for next-generation productsOccasional travel and after-hours meetings during critical milestones
Boeing continuously shapes the future of aerospace and space systems, advancing U.S. leadership in space while amplifying human creativity and intelligence. As a Boeing engineer, you’ll join a diverse, collaborative team solving high‑impact challenges in complex semiconductor design. If you value a company that supports strong work–life balance and meaningful technical work, Boeing is the place to be.
How to make your application stand out:
If you are a creative, autonomous engineer passionate about advancing DFT for mission-critical ASICs, we want to hear from you. Please include a cover letter/brief summary of relevant DFT experience when submitting your application.
This position is expected to be 100% onsite. The selected candidate will be required to work onsite at the listed location.
Basic Qualifications (Required Skills/Experience):
The position must meet Export Control compliance requirements, therefore a “US Person” as defined by 22 C.F.R. § 120.15 is required. “US Person” includes US Citizen, lawful permanent resident, refugee, or asylee.Bachelor of Science degree in Engineering (with a focus in Electrical, Mechanical or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications directly related to the work statement2+ years of experience in Design for Testability (DFT) or equivalent (role level adjustable by experience).Strong knowledge of ASIC/logic design flow, HDL (Verilog/SystemVerilog), static timing analysis, and ECO processes.Hands-on expertise with TAP/JTAG, IJTAG (IEEE 1687), Boundary Scan (IEEE 1149.1), MBIST, scan compression, ATPG, at-speed test, and silicon debug.Proficiency in scripting (Tcl/Perl/Python) and DFT verification methodologies.Excellent analytical, problem-solving, and communication skills.
Preferred Qualifications (Desired Skills/Experience):
Experienced, Level 3: 5+ years of related engineering experienceLead, Level 4: 9+ years of related engineering experienceBachelor’s Degree or Master’s Degree in EE, Computer Engineering/Science, or related fieldActive U.S. Secret Security Clearance, or the ability to obtain a US Security Clearance for which the US Government requires US Citizenship.Requirements development and traceability experienceFPGA implementation including constraints and timing closureStatic timing analysis experienceUnderstanding of timing fundamentals and CDC conceptsVerification collaboration experienceHigh-speed interfaces, processor integration, memory subsystems, or SoC integrationMentoring or technical leadership exposureFamiliarity with industry-standard tools and methodologies
Conflict of Interest:
Successful candidate for this job must satisfy the Company’s Conflict of Interest (COI) assessment process.
Typical Education/Experience:
Associate, Level 2: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g. Bachelor) and typically 2 or more years’ related work experience or an equivalent combination of technical education and experience (e.g. Master). In the USA, ABET accreditation is the preferred, although not required, accreditation standard.
Experienced, Level 3: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, engineering technology (includes manufacturing engineering technology), computer science, engineering data science, mathematics, physics or chemistry (e.g. Bachelor) and typically 5 or more years’ related work experience or an equivalent combination of technical education and experience or non-US equivalent qualifications. In the USA, ABET accreditation is the preferred, although not required, accreditation standard.
Lead, Level 4: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, engineering technology (includes manufacturing engineering technology), computer science, engineering data science, mathematics, physics or chemistry (e.g. Bachelor) and typically 9 or more years’ related work experience or an equivalent combination of technical education and experience or non-US equivalent qualifications. In the USA, ABET accreditation is the preferred, although not required, accreditation standard.
Relocation:
This position offers relocation based on candidate eligibility. Note: Basic relocation will be offered for eligible internal candidates.
Drug Free Workplace:
Boeing is a Drug Free Workplace where post offer applicants and employees are subject to testing for marijuana, cocaine, opioids, amphetamines, PCP, and alcohol when criteria is met as outlined in our policies.
Shift Work:
This position is for 1st shift.
Total Rewards:
At Boeing, we strive to deliver a Total Rewards package that will attract, engage and retain the top talent. Elements of the Total Rewards package include competitive base pay and variable compensation opportunities.
The Boeing Company also provides eligible employees with an opportunity to enroll in a variety of benefit programs, generally including health insurance, flexible spending accounts, health savings accounts, retirement savings plans, life and disability insurance programs, and a number of programs that provide for both paid and unpaid time away from work.
The specific programs and options available to any given employee may vary depending on eligibility factors such as geographic location, date of hire, and the applicability of collective bargaining agreements.
Pay is based upon candidate experience and qualifications, as well as market and business considerations.
Summary pay range for Associate, (Level 2): $98,600 - $133,400
Summary pay range for Experienced, (Level 3): $119,850 - $162,150
Summary pay range for Lead, (Level 4): $146,200 - $197,800
Language Requirements:
Not Applicable
Education:
Bachelor’s Degree or Equivalent
Relocation:
This position offers relocation based on candidate eligibility.
Export Control Requirement:
Safety Sensitive:
Security Clearance:
This position does not require a Security Clearance.
Visa Sponsorship:
Employer will not sponsor applicants for employment visa status.
Contingent Upon Award Program
This position is not contingent upon program award
Shift:
Shift 1 (United States of America)
Stay safe from recruitment fraud! The only way to apply for a position at Boeing is via our Careers website. Learn how to protect yourself from recruitment fraud - Recruitment Fraud Warning
Boeing is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military/veteran status or other characteristics protected by law.
EEO is the law
Boeing EEO Policy
Request an Accommodation
Applicant Privacy
Boeing Participates in E – Verify
E-Verify (English) E-Verify (Spanish)
Right to Work Statement
Right to Work (English) Right to Work (Spanish)
Stateside Spec lists roles for engineering teams in the United States. Work-authorization notes come from the employer. We do not guarantee visa policy. Apply off-site. Report an issue with this listing View employer source