Stateside Spec Engineering jobs in the United States

Intel

SoC Logic Design Engineer

Santa Clara, CA · On-site · Intern

Discipline
Hardware
Industry
Semiconductor

Spec sheet

Automatically summarized from the employer’s posting. Check the original description below for full requirements.

SoC Logic Design Engineer at Intel in Santa Clara, CA, focusing on design/integration of logic for Xeon server SoCs and IPs. Requires MS/equiv with 6+ months experience and 3+ months in IC/SoC design and Verilog/SystemVerilog; exposure to toolchain listed; hybrid work model; US location.

$105,650–$149,150 / year · Day shift · Equity · 0+ years · Master's degree in Electrical Engineering, Computer EE Engineering, or Computer Science

Required

  • Master's degree in Electrical Engineering, Computer EE Engineering, or Comput...
  • 3+ months of experience with IC/SoC design or integration concepts
  • 3+ months of experience with tools such as Synopsys Core tools, VCS, Modelsim...
  • 3+ months of experience programming languages such as Verilog, System Verilog...

Preferred

  • Cross-functional collaboration
  • Physical design and validation familiarity
  • Interest in data center technology

Benefits

  • medical
  • retirement
  • vacation

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Employer description

Job Details:

Job Description: The Role and Impact
As a SoC Logic Design Engineer, you will play a key role in creating and integrating cutting-edge logic designs for next-generation Xeon server product SoCs and IPs. You will actively collaborate with multidisciplinary teams to ensure functional correctness, drive innovation, and contribute to seamless integration and validation on advanced technologies. Your work will directly impact Intel’s ability to deliver highly optimized and efficient solutions for data center applications.

Business Group
You will be part of the Data Center Group (DCG), a leading organization driving Intel’s advancements in cloud computing, AI, and enterprise infrastructure. The group focuses on developing high-performance Xeon processors and other critical technologies that support Intel’s mission of delivering world-changing innovation. Through collaboration and excellence, the DCG team pushes the boundaries of design and engineering to meet the evolving needs of the data-driven world.

Key Responsibilities

  • Collaborate with the SoC integration team to develop and integrate logic designs for components and fabric.
  • Partner with the SoC validation team to identify and resolve bugs, ensuring optimal functionality for SoC RTL and tiles.
  • Work closely with the physical design and architecture teams to maintain architectural accuracy during implementation.
  • Perform design checks using industry-standard tools to ensure compliance with design standards and best practices.
  • Contribute to IC/SoC design and integration processes, ensuring high-quality designs that meet product specifications.

Qualifications:Minimum Qualifications
Master’s degree in Electrical Engineering, Computer EE Engineering, or Computer Science with6+ months of hands-on experience.
3+ months of experience with IC/SoC design or integration concepts.
3+ months of experienceh tools such as Synopsys Core tools, VCS, Modelsim, Synopsys Design Compiler, Spyglass, or Lint.
3+ months of experienceprogramming languages such as Verilog, System Verilog, Perl, Tcl, Python, or C/C++.

Preferred Qualifications

  • Demonstrated ability to communicate and collaborate effectively within cross-functional teams.
  • Strong problem-solving and critical-thinking skills applicable to complex design challenges.
  • Familiarity with physical design and validation processes.
  • Passion for innovative technology and a desire to contribute to the advancement of the data center industry.

Join Intel to become part of a team that’s shaping the future of technology. Bring your expertise, creativity, and passion to a role where you can make a lasting impact while advancing your career. Apply today to start your journey toward groundbreaking innovation.

          

Job Type:College Grad

Shift:Shift 1 (United States of America)

Primary Location: US, California, Santa Clara

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USD 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. 

 

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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