Micron
Principal Design Engineer, HBM Architecture
Richardson, TX · On-site · Senior
- Discipline
- Hardware
- Industry
- Semiconductor
Spec sheet
Automatically summarized from the employer’s posting. Check the original description below for full requirements.
Principal Design Engineer for Micron in Richardson, TX, focusing on HBM datapath architecture, design, and optimization for high-bandwidth memory products. Requires 7+ years in high-speed digital datapath design and related RTL/schematic work, with strong HBM/DRAM knowledge.
7+ years · Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
Required
- high-speed datapath design
- Schematic build, RTL, or mixed-signal datapath implementations
- HBM/DRAM architectures understanding
- clocking, gating, reset strategies
- EDA tools for timing/verification
- collaboration with cross-functional teams
- 7+ years relevant experience
Preferred
- static timing analysis (STA)
- timing-closure methodologies
- layout/floorplanning for high-speed datapath
- power optimization
- AI tool usage
- Mentoring
- HBM datapath experience
Benefits
- medical
- paid time off
- paid holidays
- dental
- vision
- 401k
Employer description
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
The HBM Architecture team develops advanced datapath solutions that enable industry‑leading bandwidth, power efficiency, reliability, and scalability for Micron’s next‑generation High Bandwidth Memory (HBM) products. The team collaborates closely across design, PHY, ECC, verification, layout, and system groups to drive innovative logic‑die and core‑die architectures from concept through production.
We are seeking a highly motivated HBM Datapath Engineer to architect, design, and optimize high‑speed data paths for next‑generation High Bandwidth Memory (HBM) products! This role focuses on logic‑die and core‑die datapath circuitry, enabling industry‑leading bandwidth, power efficiency, reliability, and scalability across JEDEC and custom HBM solutions. The ideal candidate will work closely with design, PHY, ECC, verification, layout, and system teams to deliver robust datapath designs from concept through silicon bring‑up and production.
Responsibilities will include, but are not limited to:Architect and design HBM read and write datapath across core and logic die, including alignment, buffering, timing, and control logicDevelop high‑speed, low‑latency datapath circuits supporting multi‑channel HBM architectures and wide internal busesOptimize datapath designs for bandwidth, power, area, and timing closure at advanced technology nodesDesign and integrate data reliability features, including parity, ECC hooks, lane redundancy, and remapping mechanismsCollaborate with multi-functional teams to translate specifications into robust micro‑architecturesCollaborate with PHY, DFT, verification, and layout teams to ensure accurate functionality, testability, and manufacturabilityDrive schematic‑level and RTL‑level datapath implementations, including clocking, gating, and reset strategiesContribute to design reviews, documentation, and technical mentoring across HBM programsLeveraging AI tools to efficiently carry out regular work
Required Qualifications:Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field with 7+ years of relevant industry experience, or a Master’s degree with 5+ years of relevant industry experience.3+ years of experience in high‑speed digital datapath design (memory, SerDes, or SoC datapath).2+ years of hands‑on experience with digital schematic build, RTL, or mixed‑signal datapath implementations.
Preferred Qualifications:Strong understanding of HBM/DRAM architectures, including read/write data flow, timing, and multi‑channel operation.Working knowledge of layout and floorplanning considerations for high‑speed datapath.Experience with static timing analysis (STA) and timing‑closure methodologies.Familiarity with advanced process‑node challenges related to signal integrity, skew control, and power optimization.
As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.
Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
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To learn more about Micron, please visit micron.com/careers
For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at [email protected] or 1-800-336-8918 (select option #3)
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
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