Stateside Spec Engineering jobs in the United States

NVIDIA

Senior Mixed-Signal Design Engineer

Santa Clara, CA · On-site · Senior

Discipline
Hardware
Industry
Semiconductor

Spec sheet

Automatically summarized from the employer’s posting. Check the original description below for full requirements.

Senior Mixed-Signal Design Engineer at NVIDIA in Santa Clara, CA, focuses on verification of mixed-signal CMOS circuits for GPUs/SoCs. Requires 5+ years in CMOS Analog/Mixed Signal design and SystemVerilog/HVL expertise.

$136,000–$264,500 / year · Day shift · Equity · 5+ years · Bachelors Degree in EE, CS or CE (or equivalent experience)

Required

  • Mixed-signal CMOS circuit design
  • Verification of design and implementation
  • SystemVerilog or HVL
  • Cadence IC design tools
  • HSpice or similar analog simulation
  • test bench development
  • debugging and analytical skills

Preferred

  • Perl and C/C++ programming
  • team collaboration
  • strong debugging skills

Benefits

  • equity
  • medical
  • PTO

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Employer description

We are looking for an Engineer to verify the design and implementation of the world’s leading SoC’s and GPU’s. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence!

We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the high-speed Serdes platform for the future of computing. Join our dynamic team today!

What you’ll be doing:

As a key member of our circuit verification team, you will verify the design and implementation of the industry’s leading GPU

Be responsible for verification of the Mixed Signal CMOS circuit design, architecture, golden models using advanced verification methodologies

Understand sophisticated mixed-signal CMOS circuits design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design

You’ll closely with multi-functional teams, circuit and logic design, verification, test engineering to accomplish tasks

What we need to see:

Bachelors Degree in EE, CS or CE (or equivalent experience)

5+ years of proven experience

Experience in deep sub-micron process design experience in CMOS Analog / Mixed Signal Circuit Design

Skilled using design and verification tools (Cadence’s IC design environment, analog circuit simulation tools like HSpice, Finesim, XA)

Experience in crafting test bench environments for component and top level circuit verification

Expertise in System Verilog or similar HVL

Have strong debugging and analytical skills

Perl and C/C++ programming language experience desirable

Strong interpersonal skills and ability & desire to work as a great teammate are huge plus

Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:
136,000 USD – 218,500 USD for Level 3; and 168,000 USD – 264,500 USD for Level 4.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until November 3, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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